LDPC Encoder

Support for all codes defined in 5G NR standard (3GPP TS 38.212)

​Coded throughput up to 68Gb/S for ASIC and 18.5Gb/s for FPGA

Easily customizable as per request by the customer

Provide separate optimized designs for filler bit insertion at the input and  puncturing and filler bit removal at the output.